riscv-memory-model
A formalization of the RVWMO (RISC-V) memory model
Possibly Available
About
Computer architecture researcher at NVIDIA
Evidence-backed skills
Repositories
coatcheck
COATCheck
riscv_axiomatic
An axiomatic concurrency model for RISC-V
riscv-isa-manual
RISC-V Instruction Set Manual
P1239
P1239 Proposal for WG21
daniellustig.github.io
Personal Website
libcudacxx
The C++ Standard Library for your entire system.
llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.
riscv-isa-sim
Spike, a RISC-V ISA Simulator
riscv-opcodes
RISC-V Opcodes